
module keccakf_top(
    input clk,
    input rst,
    input                    r2s_we,
    input [1:0]              r2s_we_sel,
    input [31:0]             r2s_data,
    output [99:0]            data_out,
    input                    prg_con_ena,
    input [1:0]              prg_con
);
    reg [4:0] round = 0;
    
    reg always_round = 1'b1;
    reg one_round = 1'b0;
    
    
    always@(posedge clk or negedge rst) begin 
        if (!rst) begin
            round <= 0;
            always_round <= 1'b1;
            one_round <= 1'b0;
        end
        else begin
          case({prg_con_ena,prg_con})
            3'b100:begin
              round <= 0;
              one_round <= 1'b0;
            end
            3'b101:begin
              one_round <= 1'b1;
              if (round == 16)
                  round <= 1;
              else
                  round <= round + 1;
            end
            3'b110:begin
              always_round <= 1'b0;
              if (round == 16)
                  round <= 1;
              else
                  round <= round + 1;
              one_round <= 1'b0;
            end
            3'b111:begin
              always_round <= 1'b1;
              if (round == 16)
                  round <= 1;
              else
                  round <= round + 1;
              one_round <= 1'b0;
            end
            default:begin
              one_round <= 1'b0;
              if (always_round == 1'b1) begin
                if (round == 16)
                    round <= 1;
                else
                    round <= round + 1;
              end
              else begin
                round <= round == 0 ? 1 : round;
              end
            end
          endcase
        end
    end 
    
    keccakf u_keccakf(
        .clk(clk),
        .rst(rst),
        
        .round(round),
        
        .r2s_we(r2s_we),
        .r2s_we_sel(r2s_we_sel),
        .r2s_data(r2s_data),
        
        .data_out(data_out),
        
        .always_round(always_round),
        .one_round(one_round)
    );
    
    
    
endmodule
